Commit f3029863 authored by Kevin Harms's avatar Kevin Harms
Browse files

Move support utilities to separate file; update log format for adding memory mode info

parent 30b57bd4
......@@ -13,9 +13,9 @@ CFLAGS_SHARED += \
-DDARSHAN_USE_APXC \
-I$(srcdir)/../modules/autoperf/crayxc
lib/darshan-apxc.o: lib/darshan-apxc.c darshan.h darshan-common.h $(DARSHAN_LOG_FORMAT) darshan-apxc-log-format.h | lib
lib/darshan-apxc.o: lib/darshan-apxc.c lib/darshan-apxc-utils.h darshan.h darshan-common.h $(DARSHAN_LOG_FORMAT) darshan-apxc-log-format.h | lib
$(CC) $(CFLAGS) -c $< -o $@
lib/darshan-apxc.po: lib/darshan-apxc.c darshan.h darshan-dynamic.h darshan-common.h $(DARSHAN_LOG_FORMAT) darshan-apxc-log-format.h | lib
lib/darshan-apxc.po: lib/darshan-apxc.c lib/darshan-apxc-utils.h darshan.h darshan-dynamic.h darshan-common.h $(DARSHAN_LOG_FORMAT) darshan-apxc-log-format.h | lib
$(CC) $(CFLAGS_SHARED) -c $< -o $@
......@@ -10,7 +10,13 @@
/* current AutoPerf Cray XC log format version */
#define DARSHAN_APXC_VER 1
#define APXC_RTR_COUNTERS \
#define APXC_PERF_COUNTERS \
/* non-PAPI counters first */\
X(AR_RTR_GROUP) \
X(AR_RTR_CHASSIS) \
X(AR_RTR_BLADE) \
X(AR_RTR_NODE) \
/* PAPI counters after this point */\
X(AR_RTR_0_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_0_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_0_INQ_PRF_INCOMING_FLIT_VC2) \
......@@ -20,14 +26,424 @@
X(AR_RTR_0_0_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_0_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_0_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_1_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_1_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_2_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_2_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_3_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_3_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_4_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_4_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_5_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_5_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_6_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_6_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_0_7_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_0_7_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_0_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_0_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_1_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_1_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_2_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_2_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_3_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_3_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_4_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_4_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_5_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_5_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_6_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_6_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_1_7_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_1_7_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_0_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_0_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_1_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_1_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_2_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_2_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_3_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_3_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_4_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_4_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_5_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_5_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_6_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_6_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_2_7_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_2_7_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_0_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_0_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_1_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_1_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_2_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_2_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_3_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_3_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_4_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_4_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_5_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_5_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_6_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_6_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_3_7_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_3_7_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_0_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_0_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_1_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_1_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_2_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_2_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_3_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_3_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_4_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_4_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_5_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_5_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_6_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_6_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC1) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC2) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC3) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC5) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC6) \
X(AR_RTR_4_7_INQ_PRF_INCOMING_FLIT_VC7) \
X(AR_RTR_4_7_INQ_PRF_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_0_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_0_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_0_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_0_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_1_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_1_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_1_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_1_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_2_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_2_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_2_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_2_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_3_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_3_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_3_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_3_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_4_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_4_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_4_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_4_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_5_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_5_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_5_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_5_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_6_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_6_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_6_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_6_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_7_INQ_PRF_INCOMING_FLIT_VC0) \
X(AR_RTR_PT_5_7_INQ_PRF_INCOMING_FLIT_VC4) \
X(AR_RTR_PT_5_7_INQ_PRF_REQ_ROWBUS_STALL_CNT) \
X(AR_RTR_PT_5_7_INQ_PRF_RSP_ROWBUS_STALL_CNT) \
/* end of counters */\
X(APXC_RTR_NUM_INDICES)
X(APXC_PERF_NUM_INDICES)
#define APXC_MEMORY_MODES \
X(MM_UNKNOWN) \
X(MM_FLAT) \
X(MM_EQUAL) \
X(MM_SPLIT) \
X(MM_CACHE) \
X(MM_NUM_INDICES)
#define APXC_CLUSTER_MODES \
X(CM_UNKNOWN) \
X(CM_ALL2ALL) \
X(CM_QUAD) \
X(CM_HEMI) \
X(CM_SNC4) \
X(CM_SNC2) \
X(CM_NUM_INDICIES)
#define X(a) a,
/* integer counters for the "BGQ" example module */
enum darshan_apxc_rtr_indices
enum darshan_apxc_perf_indices
{
APXC_PERF_COUNTERS
};
enum apxc_memory_modes
{
APXC_MEMORY_MODES
};
enum apxc_cluster_modes
{
APXC_RTR_COUNTERS
APXC_CLUSTER_MODES
};
#undef X
......@@ -39,19 +455,20 @@ enum darshan_apxc_rtr_indices
* - integer I/O counters
* - floating point I/O counters
*/
struct darshan_apxc_router_record
struct darshan_apxc_perf_record
{
struct darshan_base_record base_rec;
int64_t coord[4]; /* ugroup, uchassis, ublade, unode */
int64_t counters[APXC_RTR_NUM_INDICES];
int64_t counters[APXC_PERF_NUM_INDICES];
};
struct darshan_apxc_header_record
{
struct darshan_base_record base_rec;
int64_t nblades;
int64_t nchassis;
int64_t ngroups;
int nblades;
int nchassis;
int ngroups;
int memory_mode;
int cluster_mode;
};
#endif /* __DARSHAN_APXC_LOG_FORMAT_H */
#ifndef __DARSHAN_APXC_UTILS_H__
#define __DARSHAN_APXC_UTILS_H__
#include <regex.h>
static void search_hwinfo(const char * mstr, char *mode)
{
FILE *f;
int r;
char *fdata;
long len;
regex_t preg;
regmatch_t mreg[1];
r = regcomp(&preg, mstr, 0);
f = fopen ("/.hwinfo.cray", "rb");
fseek(f, 0, SEEK_END);
len = ftell(f);
fdata = malloc(len);
fseek(f, 0, SEEK_SET);
fread(fdata, sizeof(char), len, f);
fclose(f);
r = regexec(&preg, fdata, 1, mreg, 0);
if ((r == 0) && (mreg[0].rm_so > -1))
{
sscanf(fdata+mreg[0].rm_so+strlen(mstr)-2, "%s", mode);
}
regfree(&preg);
free(fdata);
return;
}
static int get_memory_mode (int node)
{
char memory_mode[64];
char mcdram_str[64];
sprintf(mcdram_str, "mcdram_cfg\\[%d\\]=", node);
search_hwinfo(mcdram_str, memory_mode);
printf("memory mode = %s\n", memory_mode);
if (strcmp(memory_mode, "flat") == 0)
{
return MM_FLAT;
}
else if (strcmp(memory_mode, "cache") == 0)
{
return MM_CACHE;
}
else if (strcmp(memory_mode, "split") == 0)
{
return MM_SPLIT;
}
else if (strcmp(memory_mode, "equal") == 0)
{
return MM_EQUAL;
}
return MM_UNKNOWN;
}
static int get_cluster_mode (int node)
{
char cluster_mode[64];
char numa_str[64];
sprintf(numa_str, "numa_cfg\\[%d\\]=", node);
search_hwinfo(numa_str, cluster_mode);
printf("cluster mode = %s\n", cluster_mode);
if (strcmp(cluster_mode, "a2a") == 0)
{
return CM_ALL2ALL;
}
else if (strcmp(cluster_mode, "quad") == 0)
{
return CM_QUAD;
}
else if (strcmp(cluster_mode, "hemi") == 0)
{
return CM_HEMI;
}
else if (strcmp(cluster_mode, "snc4") == 0)
{
return CM_SNC4;
}
else if (strcmp(cluster_mode, "snc2") == 0)
{
return CM_SNC2;
}
return CM_UNKNOWN;
}
static void get_xc_coords (int *group,
int *chassis,
int *blade,
int *node)
{
FILE *f = fopen("/proc/cray_xt/cname","r");
if (f != NULL)
{
char a, b, c, d;
int racki, rackj, cchassis, sblade, nic;
/* format example: c1-0c1s2n1 c3-0c2s15n3 */
fscanf(f, "%c%d-%d%c%d%c%d%c%d",
&a, &racki, &rackj, &b, &cchassis, &c, &sblade, &d, &nic);
fclose(f);
*group = racki/2 + rackj*6;
*chassis = (racki%2) * 3 + cchassis;
*blade = sblade;
*node = nic;
}
else
{
*group = -1;
*chassis = -1;
*blade = -1;
*node = -1;
}
return;
}
static unsigned int count_bits(unsigned int *bitvec, int cnt)
{
unsigned int count = 0;
int i;
for (i = 0; i < cnt; i++)
{
count += __builtin_popcount(bitvec[i]);
}
return count;
}
#endif
......@@ -20,17 +20,21 @@
#include "darshan-dynamic.h"
#include "darshan-apxc-log-format.h"
#include "darshan-apxc-utils.h"